Demonstrates technology that bridges pre-silicon and post-silicon validation using IEEE 1149.1-2013
Informative Webinar to be held on September 24 and 25
NORTH READING, Mass.--(BUSINESS WIRE)--Teradyne, Inc. (NYSE: TER) and Intellitech Corp. announced they have demonstrated an improvement in the silicon validation time for System-on-a-Chip (SoC) devices. Engineering teams from the two companies collaborated using the IEEE 1149.1-2013 standard with Teradyne s UltraFLEX digital instruments and Intellitech s NEBULA silicon debugger on a state-of-the-art SoC device. The IP cores in the SoC device were debugged in hours rather than weeks by simplifying engineers interaction with the IP cores through hierarchical access and high-level commands. This approach also allowed pre-silicon simulation and more compact test files compared to a traditional, vector-based methodology.
With the same PDL documentation and the same software interface, many variables normally presented to the engineer during traditional silicon bring-up, were eliminated.
The high performance instruments our customers depend on to test their semiconductor devices are powered by Teradyne designed, custom integrated circuits (ICs). IP validation had been a consistent schedule bottleneck in our new devices. The longer validation times, driven by increasing numbers of IP blocks, had to be reduced in order to achieve our time-to-market goals, said Andre Hendarman, ASIC Development Director, Teradyne. By leveraging our strength in production ATE with Intellitech s advanced design-for-test tools, we achieved a significant improvement in debug time. The collaboration between Intellitech and Teradyne created a unique opportunity to validate tests pre-silicon via simulation, post-silicon on ATE using Teradyne s Protocol Aware and Concurrent Test features, and at the system level.
"Customers striving to gain a time-to-market leap are now specifically requesting that their IP vendors provide pre-verified IEEE 1149.1-2013 compliant documentation. They realize this new standard for IP documentation, IEEE 1149.1 Procedural Description Language (PDL), offers significant advantages in portability and reusability between the pre-silicon verification environment and post silicon debug on the UltraFLEX," said CJ Clark, CEO, Intellitech Corp. "With the same PDL documentation and the same software interface, many variables normally presented to the engineer during traditional silicon bring-up, were eliminated.
This technology will change how design and test teams communicate about test implementation. It represents a new paradigm for our industry - a partnership between IP vendors, fabless designers and ATE vendors to reduce development time for complex devices. Teradyne will co-host a webinar to discuss the advantages and experience to date with this new technology, added Keith Thomas, Teradyne Software Marketing Manager.
Two web seminars that describe the technology have been planned. Session 1 will be held on Thursday, Sept. 24 at 11 a.m. (EDT) and Session 2 will be held on Friday, Sept. 25 at 9 a.m. (Singapore time - SGT). For information about how to join these sessions, go to http://teradyne.com/press-room/events-conferences.
Intellitech is the technology leader in solutions based on IEEE 1149.x related standards. The company is sought out by customers to provide methodologies, IP and tools which lower a customer's cost in developing or manufacturing an electronic product. More information about Intellitech can be found at www.intellitech.com. Intellitech is a registered trademark of Intellitech Corp. in the U.S., E.U. and other countries. Silicon Instruments and NEBULA are trademarks of Intellitech Corp.
Teradyne (NYSE:TER) is a leading supplier of automation solutions for test and industrial applications. Teradyne Automatic Test Equipment (ATE) is used to test semiconductors, wireless products, data storage and complex electronic systems, which serve consumer, communications, industrial and government customers. Our Industrial Automation solutions include Collaborative Robots used by global manufacturing and light industrial customers to improve quality and increase manufacturing efficiency. In 2014,Teradynehad revenue of$1.65 billionand currently employs approximately 4,000 people worldwide. For more information, visitwww.teradyne.com. Teradyne (R) is a registered trademark ofTeradyne, Inc.in the U.S. and other countries.
For a Complete Version of this BUSINESS WIRE Press Release